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학술지 High-gain and Low-hysteresis Properties of Organic Inverters with an UV-photo Patternable Gate Dielectrics
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저자
임상철, 김성현, 김기현, 구재본, 양용석, 이정훈, 구찬회, 송윤호
발행일
200804
출처
Thin Solid Films, v.516 no.12, pp.4330-4333
ISSN
0040-6090
출판사
Elsevier
DOI
https://dx.doi.org/10.1016/j.tsf.2007.12.134
초록
Low-hysteresis properties for an organic thin-film transistor (OTFTs) and a high-gain inverter were fabricated using a self-synthesized UV-photo patternable gate dielectric. The hysteresis behavior was not observed in the transfer characteristics of OTFTs or in the voltage transfer characteristics of the organic inverter. For a given dielectric thickness and applied voltage, pentacene OTFTs with inverter circuits were characterized by the field effect mobility, the on/off current ratio, threshold voltage (Vth), and the gain. The field effect mobility, Vth and the on/off currents ratio were 0.03혻cm2/Vs,- 3.3혻V and 106, respectively. The inverter has very large gain of 32 and matching input and output levels, despite having a positive switch-on voltage and slight hysteresis. From OTFT device and inverter circuit measurements, it was found that the hysteresis behavior was caused by the interface-state charge trapping between the gate dielectric and the pentacene semiconductor layer. © 2007 Elsevier B.V. All rights reserved.
KSP 제안 키워드
Charge trapping, Dielectric thickness, Hysteresis properties, Interface states, Inverter circuit, Large gain, Low hysteresis, ON/OFF current ratio, Organic thin-film transistors, Self-synthesized, Thin-Film Transistor(TFT)