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학술지 A Two-Layer Stacked Polycrystalline Silicon Thin Film Transistor Complementary Metal Oxide Semiconductor Inverters Using Laser Crystallized Channel with High-k and Metal Gate on Si
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저자
오순영, 안창근, 양종헌, 조원주, 장문규
발행일
200804
출처
Japanese Journal of Applied Physics, v.47 no.4, pp.3091-3094
ISSN
0021-4922
출판사
Japan Society of Applied Physics (JSAP), Institute of Physics (IOP)
DOI
https://dx.doi.org/10.1143/JJAP.47.3091
협약과제
07ZB1200, 정보통신미래신기술연구사업, 정태형
초록
The fabrication methods and characteristics of polycrystalline silicon (poly-Si) thin film transistor (TFT) stacked complementary metal oxide semiconductor (CMOS) inverters were demonstrated the feasibility for high performance logic circuit applications was verified. The laser crystallization processes were compatible with the poly-Si TFT stacked CMOS inverters and the laser crystallized poly-Si films showed uniform grain size with low surface roughness and excellent crystallinity. In order to fabricate three-dimensional (3-D) stacked poly-Si CMOS inverters, the p-channel MOSTFTs (PMOS) at upper poly-Si layer were stacked on the n-channel MOSTFT (NMOS) at lower poly-Si and interlayer dielectric (ILD) layer. The HfO2 gate dielectrics and Pt metal gates were applied to the upper PMOSTFT to avoid the degradation of lower NMOSTFT. The CMOS inverters fabricated by stacking the poly-Si TFTs revealed good characteristics for the 3-D integrated CMOS applications. © 2008 The Japan Society of Applied Physics.
KSP 제안 키워드
Applied physics, CMOS applications, CMOS inverters, Complementary metal-oxide-semiconductor(CMOS), Fabrication method, High performance, High-K, Interlayer dielectric, Laser crystallization, Laser crystallized channel, Low surface roughness