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Journal Article A Two-Layer Stacked Polycrystalline Silicon Thin Film Transistor Complementary Metal Oxide Semiconductor Inverters Using Laser Crystallized Channel with High-k and Metal Gate on Si
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Authors
Soon-Young Oh, Chang-Geun Ahn, Jong-Heon Yang, Won-Ju Cho, Moon-Gyu Jang
Issue Date
2008-04
Citation
Japanese Journal of Applied Physics, v.47 no.4, pp.3091-3094
ISSN
0021-4922
Publisher
Japan Society of Applied Physics (JSAP), Institute of Physics (IOP)
Language
English
Type
Journal Article
DOI
https://dx.doi.org/10.1143/JJAP.47.3091
Project Code
07ZB1200, Future Technology Researches in the Fields of Informations and Telecommunications, Taehyoung Zyung
Abstract
The fabrication methods and characteristics of polycrystalline silicon (poly-Si) thin film transistor (TFT) stacked complementary metal oxide semiconductor (CMOS) inverters were demonstrated the feasibility for high performance logic circuit applications was verified. The laser crystallization processes were compatible with the poly-Si TFT stacked CMOS inverters and the laser crystallized poly-Si films showed uniform grain size with low surface roughness and excellent crystallinity. In order to fabricate three-dimensional (3-D) stacked poly-Si CMOS inverters, the p-channel MOSTFTs (PMOS) at upper poly-Si layer were stacked on the n-channel MOSTFT (NMOS) at lower poly-Si and interlayer dielectric (ILD) layer. The HfO2 gate dielectrics and Pt metal gates were applied to the upper PMOSTFT to avoid the degradation of lower NMOSTFT. The CMOS inverters fabricated by stacking the poly-Si TFTs revealed good characteristics for the 3-D integrated CMOS applications. © 2008 The Japan Society of Applied Physics.
KSP Keywords
Applied physics, CMOS Inverter, CMOS applications, Complementary metal-oxide-semiconductor(CMOS), Fabrication method, High performance, High-K, Interlayer dielectric, Laser crystallization, Laser crystallized channel, Low surface roughness