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Efficient Coarse Frequency Synchronizer using Serial Correlator for DVB-S2
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- Authors
- Jang Woong Park, Hyoung Jin Yun, Myung Hoon Sunwoo, Pan Soo Kim, Dae-Ig Chang
- Issue Date
- 2008-05
- Citation
- International Symposium on Circuits and Systems (ISCAS) 2008, pp.1520-1523
- Publisher
- IEEE
- Language
- English
- Type
- Conference Paper
- Abstract
- This paper proposes an efficient coarse frequency synchronizer for digital video broadcasting - second generation (DVB-S2). The input signal requirement of acquisition range for coarse frequency estimator in the DVB-S2 is around 짹1.5625Mhz, which corresponds to 6.25% of the symbol rate at 25Mbaud. At the process of analyzing the robust algorithm among data-aided approaches, we find that the Luise & Reggiannini (L&R) algorithm is the most promising one for coarse frequency estimation with respect to estimation performance and complexity. However, it requires many multipliers and adders to compute output values of correlators. We propose an efficient architecture identifying the serial correlator with the buffer and multiplexers. The proposed coarse frequency synchronizer can reduce the hardware complexity about 92% of the direct implementation. The proposed architecture has been implemented and verified on the Xilinx Virtex II FPGA. ©2008 IEEE.
- KSP Keywords
- DVB-S2, Digital video broadcasting, Frequency Estimation, Hardware complexity, Input signal, Second generation(2G), Xilinx virtex, data-aided, efficient architecture, estimation performance, frequency estimator