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High-Speed Continuous-Time Band Pass ΔΣ Modulator for Class-S Systems
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- Authors
- Bong-Hyuk Park, Seung-Hyun Jang, Philip Ostrovskyy, Jae-Ho Jung
- Issue Date
- 2014-06
- Citation
- Microelectronics Journal, v.45, no.6, pp.559-564
- ISSN
- 0026-2692
- Publisher
- Elsevier
- Language
- English
- Type
- Journal Article
- Abstract
- A fully integrated continuous-time bandpass delta-sigma modulator (BPDSM) fabricated in a 0.25 μm SiGe BiCMOS is presented. It consists of a two-stage second-order resonator, high-speed comparator, multi-feedback current digital-to-analog converter, and an output buffer. The input frequency can be tuned from 3.55 to 3.9 GHz at a 9.5 GHz fixed sampling clock frequency. This modulator dissipates 109 mA from a 3.3 V power supply. The peak signal-to-noise ratio (SNR) of the sine-wave input is 37.3 dB in a 20 MHz channel bandwidth, and the error vector magnitude (EVM) of a 64QAM long-term evolution (LTE) downlink signal is 5.94% with a 10.5 dB peak-to-average-power ratio (PAPR). © 2014 Elsevier Ltd.
- KSP Keywords
- 3 V, 9.5 GHZ, Channel bandwidth, Class-S, Clock frequency, Continuous-Time, Digital to Analog Converter, Fully integrated, High-speed comparator, Long term Evolution(LTE), Multi-feedback