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학술지 A Fully Differential injection-Locked Frequency Divider Using CMOS Technology
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저자
박봉혁, 정재호
발행일
201401
출처
Microwave and Optical Technology Letters, v.56 no.1, pp.31-34
ISSN
0895-2477
출판사
John Wiley & Sons
DOI
https://dx.doi.org/10.1002/mop.27966
협약과제
13VI1600, 차세대 이동통신 기지국용 Class-S 전력증폭기 기술 연구, 정재호
초록
A wide locking range and low phase noise injection-locked frequency divider has been developed by CMOS 0.13-μm technology. The proposed differential complementary injection-locked frequency divider (CILFD) consists of five-stage complementary inverter type connection. The differential input and output are implemented using auxiliary cross-coupled inverters. The measurement results show a divide-by-5 division ratio and a locking range from 1.5 to 4.5 GHz with an input power lower than -5 dBm. The power consumption of CILFD is 1.0 mA from 1.4-V power supply when it locked at 3-GHz input signal. © 2014 Wiley Periodicals, Inc.
KSP 제안 키워드
5 GHz, CMOS Technology, Complementary inverters, Differential input, Fully differential, Injection-locked frequency divider(ILFD), Input power, Input signal, Low phase noise, Noise injection, Power Consumption