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Conference Paper Design of Low-area Rijndael Hardware Core
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Authors
Yong-Sung Jeon, Sang-Woo Lee, Taek-Yong Nam
Issue Date
2008-07
Citation
International Conference on Computer Design (CDES) 2008, pp.1-4
Language
English
Type
Conference Paper
Abstract
This paper presents a compact 8-bit AES hardware architecture suitable for low-area and lowpower applications such as wireless network devices. Unlike the conventional 32-bit architecture which uses 8 S-boxes to implement the SubBytes transformation and the InvSubBytes transformation, the 8-bit architecture presented in this paper requires only 2 Sboxes. In addition, the number of XOR gates used by the MixColumns & InvMicColumns transformation module in the proposed 8-bit architecture can be reduced to less than half of those used in the 32-bit architecture.
KSP Keywords
Low-area, Network devices, S-box, Wireless networks, bit architecture, hardware architecture