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Journal Article New Fabrication of a Strained Si/Si1_yGey Dual Channel on a Relaxed Si1_xGex Virtual Substrate using a Ge-rich Layer Formed by Oxidation
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Authors
Sang-Hoon Kim, Hyun-Cheol Bae, Sang-Heung Lee
Issue Date
2008-07
Citation
Applied Surface Science, v.254, no.19, pp.6025-6029
ISSN
0169-4332
Publisher
Elsevier Science, Elsevier
Language
English
Type
Journal Article
DOI
https://dx.doi.org/10.1016/j.apsusc.2008.02.182
Project Code
07ZB1400, SiGe-Based Quantum Channel Nano-Device Technology, Lee Sang-Heung
Abstract
This paper presents a new method of forming a Si/SiGe dual channel on a Si 0.8 Ge 0.2 virtual substrate. Generally, in a CMOS process using a Si/SiGe dual channel, due to several processes involving ion-implantation, annealing and dry-etching after the deposition of the Si/SiGe dual channel, the surface can be damaged, leading to reduced electrical properties. However, if the dual channel is formed during a specific stage of the CMOS process, the defects of the dual channel can be reduced and the thermal stability will be excellent. Therefore, in this paper, a method for minimizing the defects of the dual channel is presented. This method uses the segregation of the Ge in the oxidation process of a SiGe. A Si/SiGe dual channel formed using this method achieved results that were identical to a dual channel deposited using the chemical vapor deposition (CVD) method. © 2008 Elsevier B.V. All rights reserved.
KSP Keywords
CMOS Process, Chemical Vapor Deposition, Ion implantation, Oxidation process, Strained-Si, Thermal stability(TGA), Virtual substrate, dry etching, dual-channel, electrical properties(I-V curve), new method