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Conference Paper
Implemention of 128-Point Fast Fourier Transform Processor for UWB Systems
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- Authors
- Sang-In Cho, Kyu-Min Kang, Sang-Sung Choi
- Issue Date
- 2008-08
- Citation
- International Wireless Communications and Mobile Computing Conference (IWCMC) 2008, pp.210-213
- Language
- English
- Type
- Conference Paper
- Abstract
- In this paper, we present a 4-parallel fast Fourier transform (FFT) processor for a multi-band orthogonal frequency division multiplexing (MB-OFDM) ultra wideband (UWB) system. The proposed FFT processor utilizes radix-2 4 structure so as to significantly enhance the hardware complexity by reducing the numbers of multipliers and adders. The hardware efficient 4-parellel 128-point FFT processor employing the decimation-in-frequency (DIF) and the singlepath delay feedback (SDF) algorithms can support throughput rates of up to 1 Gsample/s. The proposed FFT processor is implemented and tested by adopting the 0.18 μm CMOS technology with a supply voltage of 1.8 V. © 2008 IEEE.