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Conference Paper A 52GHz Millimeter-Wave PLL Synthesizer for 60GHz WPAN Radio
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Authors
Ja-Yol Lee, Hae Cheon Kim, Hyun-Kyu Yu
Issue Date
2008-10
Citation
European Micorwave Integrated Circuits Conference (EuMIC) 2008, pp.155-158
Language
English
Type
Conference Paper
DOI
https://dx.doi.org/10.1109/EMICC.2008.4772252
Project Code
08MB3200, Development of Advanced Digital RF Technology for Next Generation Wireless Convergence Terminals, Yu Hyun Kyu
Abstract
In this paper, we present the design of 52-GHz frequency synthesizer for 60GHz WPAN application. The PLL consists of 26GHz PLL and 52GHz frequency doubler, generating two channels of output carriers with 2.08GHz step by using high-speed four-modulus divider. The proposed PLL represents phase noise of - 89dBc/Hz from 26.2GHz carrier and - 81dBc/Hz from 52.4GHz carrier, at 1MHz offset, respectively. Also, its integrated RMS phase noise from 1MHz to 100MHz is measured as 7.42 Output frequency tuning range from the PLL is 50 to 53-GHz. The synthesizer including frequency double consumes 160mA at 2.5V supply voltage and occupies 1.2 - 1.0 mm2 chip area.
KSP Keywords
Chip area, Frequency doubler, Frequency synthesizer, Frequency tuning range, High Speed, Output frequency, PLL synthesizer, Supply voltage, millimeter wave(mmWave), phase noise