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Journal Article Crosstalk Reduction in a Shallow-Etched Silicon Nanowire AWG
Cited 48 time in scopus Share share facebook twitter linkedin kakaostory
Authors
Duk-Jun Kim, Jong-Moo Lee, Jung Ho Song, Jung Hyung Pyo, Gyung Ock Kim
Issue Date
2008-10
Citation
IEEE Photonics Technology Letters, v.20, no.19, pp.1615-1617
ISSN
1041-1135
Publisher
IEEE
Language
English
Type
Journal Article
DOI
https://dx.doi.org/10.1109/LPT.2008.2002731
Abstract
We introduced shallow-etched silicon nanowire into the arrayed waveguides to decrease the random phase error due to the core width fluctuation. A fairly improved crosstalk value of 18 dB was achieved in the fabricated arrayed-waveguide grating with the on-chip loss of 3 dB. © 2008 IEEE.
KSP Keywords
Chip loss, Core width, Crosstalk reduction, Etched silicon, Random phase, Silicon nanowires(SiNWs), arrayed waveguide grating(AWG), on-chip, phase error