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학술대회 Selective Multiplexer-Removal Algorithm for Lowering Power Consumption of Circuits
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신치훈, 오명훈, 김영우, 김성남, 김성운
International SoC Design Conference (ISOCC) 2008, pp.II85-II88
08ZH1100, 초저전력 비동기 프로세서 개발, 김성남
In this paper we propose an algorithm about aggressive, but partial removal of multiplexers used for sharing functional units (FUs). By eliminating some multiplexers and duplicating the FU related, the proposed algorithm could be more advantageous for low power circuits than just keeping the multiplexers. To determine whether a removal of a group of multiplexers is beneficial or not, we compared a FU with multiplexers to multiple replications of the FU without any multiplexer under various conditions. Through the experiments, we aggregated information to be used for finding appropriate multiplexers to be extricated from circuit netlist; using the information, we built an automated algorithm to remove particular multiplexers; we applied it to a netlist of 16 bit processor. The processor that is newly generated by the algorithm consumed average about 12% less power than the initial processor. ©2008 IEEE.
KSP 제안 키워드
Automated algorithm, Functional unit, Low power circuits, Power Consumption, Various conditions, partial removal