ETRI-Knowledge Sharing Plaform

ENGLISH

성과물

논문 검색
구분 SCI
연도 ~ 키워드

상세정보

학술대회 Performance analysis of NoC structure based on Star-Mesh Topology
Cited 5 time in scopus Download 2 time Share share facebook twitter linkedin kakaostory
저자
김주엽, 이미영, 김원종, 장준영, 배영환, 조한진
발행일
200811
출처
International SoC Design Conference (ISOCC) 2008, pp.II162-II165
DOI
https://dx.doi.org/10.1109/SOCDC.2008.4815709
협약과제
08MB3500, 컨버전스 SoC 기반 smart eye, 조한진
초록
The fabrication technology development of the leads the evolutional design methodology to the efficiency, such as reusability and scalability. NoC (Network On Chip) is the remarkable alternative to support this that frend provides the interface between IPs. In this paper, the general performance analysis through considering the characteristic of the NoC was done with the proposed NoC topology . Besides, the performance at the topology which is the specification application, 4-channel H.264 decoder, was predicted advance. We could build the environment facilitating the adjustment of the buffer size and mapping of IP with this scheme. ©2008 IEEE.
KSP 제안 키워드
Buffer Size, H.264 decoder, Network on Chip(NoC), Performance analysis, design methodology, fabrication technology, mesh topology