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Journal Article A Two-Stage Radix-4 Viterbi Decoder for Multiband OFDM UWB Systems
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Authors
Sung Woo Choi, Kyu Min Kang, Sang Sung Choi
Issue Date
2008-12
Citation
ETRI Journal, v.30, no.6, pp.850-852
ISSN
1225-6463
Publisher
한국전자통신연구원 (ETRI)
Language
English
Type
Journal Article
DOI
https://dx.doi.org/10.4218/etrij.08.0208.0196
Abstract
This letter presents a power efficient 64-state Viterbi decoder (VD) employing a two-stage radix-4 addcompare-select architecture. A class of VD architectures is implemented, and their hardware complexity, maximum operating speed, and power consumption are compared Implementation results show that the proposed VD architecture is suitable for multiband orthogonal frequency-division multiplexing (MB-OFDM) ultra-wideband (UWB) systems, which can support the data rate of 480 Mbps even when implemented using 0.18-μm CMOS technology.
KSP Keywords
CMOS Technology, Hardware complexity, MB-OFDM, Multiband OFDM, Operating speed, Orthogonal frequency division Multiplexing(OFDM), Power Consumption, Power-efficient, Radix-4, Two-Stage, UWB system