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Conference Paper Efficient Hardware Architecture of SHA-256 Algorithm for Trusted Mobile Computing
Cited 22 time in scopus Share share facebook twitter linkedin kakaostory
Authors
Moo Seop Kim, Jae Cheol Ryou, Sung Ik Jun
Issue Date
2008-12
Citation
International Conference on Information Security and Cryptology (Inscrypt) 2008 (LNCS 5487), v.5487, pp.240-252
Publisher
Springer
Language
English
Type
Conference Paper
DOI
https://dx.doi.org/10.1007/978-3-642-01440-6_19
Abstract
We present a compact SHA-256 hardware architecture suitable for the Trusted Mobile Platform (TMP), which requires low-area and low-power characteristics. The built-in hardware engine to compute a hash algorithm in TMP is one of the most important circuit blocks and contributes the performance of the whole platform because it is used as key primitives supporting platform integrity and command authentication. Unlike personal computers, mobile platform have very stringent limitations with respect to available power, physical circuit area, and cost. Therefore, special architecture and design methods for a compact hash hardware module are required. Our SHA-256 hardware can compute 512-bit data block using 8,588 gates on a 0.25μm CMOS process.The highest operation frequency and throughput of the proposed architecture are 136MHz and 142Mbps, which satis.es processing requirement for the mobile application.
KSP Keywords
Built-in, CMOS Process, Command authentication, Design method, Efficient Hardware Architecture, Hardware Engine, Hardware module, Hash algorithm, Low-Power, Mobile Application(APP), Mobile computing