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학술지 Eager Data Transfer Mechanism for Reducing Communication Latency in User-Level Network Protocols
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저자
원철호, Ben Lee, 박경, 김명준
발행일
200812
출처
Journal of Information Processing Systems, v.4 no.4, pp.133-144
ISSN
1976-913X
출판사
한국정보처리학회 (KIPS)
DOI
https://dx.doi.org/10.3745/JIPS.2008.4.4.133
초록
Clusters have become a popular alternative for building high-performance parallel computing systems. Today’s high-performance system area network (SAN) protocols such as VIA and IBA significantly reduce user-to-user communication latency by implementing protocol stacks outside of operating system kernel. However, emerging parallel applications require a significant improvement in communication latency. Since the time required for transferring data between host memory and network interface (NI) make up a large portion of overall communication latency, the reduction of data transfer time is crucial for achieving low-latency communication. In this paper, Eager Data Transfer (EDT) mechanism is proposed to reduce the time for data transfers between the host and network interface. The EDT employs cache coherence interface hardware to directly transfer data between the host and NI. An EDT-based network interface was modeled and simulated on the Linux-based, complete system simulation environment, Linux/SimOS. Our simulation results show that the EDT approach significantly reduces the data transfer time compared to DMA-based approaches. The EDT-based NI attains 17% to 38% reduction in user-to-user message time compared to the cache-coherent DMA-based NIs for a range of message sizes (64 bytes ~ 4 Kbytes) in a SAN environment.
KSP 제안 키워드
Cache coherence, Communication Latency, Data transfer time, High-performance parallel computing, Low-Latency Communication, Operating system kernel, Parallel applications, Parallel computing systems, Protocol stack, System area networks, System simulation environment