International Conference on Ubiquitous Information Management and Communication (ICUIMC) 2009, pp.1-6
Language
English
Type
Conference Paper
Abstract
This paper presents a low complexity soft-decision demapper for a digital video broadcasting system. To achieve the performance required by Low Density Parity Check (LDPC) code decoding, the received signal should be soft-decided rather than hard-decided. However, for supporting higher-order modulation modes the soft-decision demapper requires high hardware complexity. The proposed soft-decision demapper can reduce the hardware complexity by reusing multipliers. Moreover, the proposed demapper can support higher-order modulation modes.In addition, we propose the efficient soft-decision demapper interface. The proposed interface can operate at a symbol rate and replace a Parallel to Serial (P/S) converter by locating between an M-Phase Shift Keying (PSK) demodulator and the proposed demapper. The proposed soft-decision demapper and interface have been verified in Xilinx TM Virtex II.
KSP Keywords
Broadcasting system, Digital video broadcasting, Hardware complexity, Higher order, Low density parity check (LDPC) code, Modulation mode, Soft-decision, low-complexity, phase shift keying, symbol rate
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