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Efficient Synchronizer Architecture Using Common Autocorrelator for DVB-S2
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- Authors
- Jea Hack Lee, Jin Kyu Choi, Myung Hoon Sunwoo, Pan Soo Kim, Dae Ig Chang
- Issue Date
- 2009-05
- Citation
- International Symposium on Circuits and Systems (ISCAS) 2009, pp.1533-1536
- Publisher
- IEEE
- Language
- English
- Type
- Conference Paper
- Abstract
- This paper presents an efficient synchronizer architecture using the common autocorrelator for Digital Video Broadcasting via Satellite, Second generation (DVB-S2). To achieve the satisfactory performance under worst channel condition and the efficient H/W resource utilization of functional synchronization blocks which have been implemented, we propose a new efficient common autocorrelator structure. The proposed architecture can ensure the decrease by about 92% multipliers and 81% adders compared with the direct implementation. Moreover, it has been thoroughly verified with an FPGA board and R&S?꽓 SFU broadcast test equipment. ©2009 IEEE.
- KSP Keywords
- DVB-S2, Digital video broadcasting, FPGA Board, Second generation(2G), Test Equipment, channel condition, resource utilization