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Conference Paper Energy-Aware 32bit Parallel Processing Unit with Multi Operation Modes and 2 Step Data Gating Technique for Multimedia Processor
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Authors
Yil Suk Yang, Jong Dae Kim, Tae Moom Roh, Moon Gyu Jang, Woo H. Kwon
Issue Date
2009-07
Citation
International Conference on Computer Design (CDES) 2009, pp.80-84
Language
English
Type
Conference Paper
Abstract
This paper describes energy-aware 32bit parallel processing unit with multi operation modes and 2 step data gating technique for multimedia processor. We designed the parallel processing unit which can be altogether satisfied a performance and low power consumption with the little bit of hardware addition using multi operation modes and a 2 step data gating technique. The proposed parallel processing units with multi operation modes can enlarge the flexibility in the parallel architecture and increase the hardware resource availability. By using a combination of the multi operation modes and 2 step data gating technique, the energy efficiency of the proposed 32bit parallel processing unit with multi operation modes and 2 step data gating technique can improve about 20% than that of the conventional 32bit parallel processing unit with single operation mode and without 2 step data gating technique.
KSP Keywords
Data gating, Energy Efficiency, Energy-Aware, Gating technique, Operation modes, Parallel Architecture, Parallel Processing, Processing unit, Resource availability, low power consumption