상세정보
학술지
Design of Cryptographic Hardware Architecture for Mobile Computing
- 발행일
- 200912
- 출처
- Journal of Information Processing Systems, v.5 no.4, pp.187-196
- ISSN
- 1976-913X
- 출판사
- 한국정보처리학회 (KIPS)
- 초록
- This paper presents compact cryptographic hardware architecture suitable for the MobileTrusted Module (MTM) that requires low-area and low-power characteristics. The built-in cryptographicengine in the MTM is one of the most important circuit blocks and contributes to the performanceof the whole platform because it is used as the key primitive supporting digital signature, platformintegrity and command authentication. Unlike personal computers, mobile platforms have very stringentlimitations with respect to available power, physical circuit area, and cost. Therefore special architectureand design methods for a compact cryptographic hardware module are required. The proposedcryptographic hardware has a chip area of 38K gates for RSA and 12.4K gates for unified SHA-1 andSHA-256 respectively on a 0.25um CMOS process. The current consumption of the proposed cryptographichardware consumes at most 3.96mA for RSA and 2.16mA for SHA computations under the25MHz.
- KSP 제안 키워드
- Built-in, CMOS Process, Chip area, Command authentication, Cryptographic hardware, Current consumption, Design method, Digital signature, Hardware Architecture, Hardware module, Low-Power