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Journal Article Effects of ZnO Channel Thickness on the Device Behaviour of Nonvoltile Memory Thin Film Transistor with Double-layered Gate Insulators of Al2O3 and Ferroelectric Polymer
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Authors
Sung-Min Yoon, Shin-Hyuk Yang, Sang-Hee Ko Park, Soon-Won Jung, Doo-Hee Cho, Chun-Won Byun, Seung-Youl Kang, Chi-Sun Hwang, Byoung-Gon Yu
Issue Date
2009-11
Citation
Journal of Physics D : Applied Physics, v.42, no.24, pp.1-6
ISSN
0022-3727
Publisher
Institute of Physics (IOP)
Language
English
Type
Journal Article
DOI
https://dx.doi.org/10.1088/0022-3727/42/24/245101
Abstract
Poly(vinylidene fluoride trifluoroethylene) and ZnO were employed for nonvolatile memory thin film transistors as ferroelectric gate insulator and oxide semiconducting channel layers, respectively. It was proposed that the thickness of the ZnO layer be carefully controlled for realizing the lower programming voltage, because the serially connected capacitor by the formation of a fully depleted ZnO channel had a critical effect on the off programming voltage. The fabricated memory transistor with Al/P(VDF-TrFE) (80 nm)/Al 2O3 (4 nm)/ZnO (5 nm) exhibits encouraging behaviour such as a memory window of 3.8 V at the gate voltage of -10 to 12 V, and 10 7 on/off ratio, and a gate leakage current of 10-11 A. © 2009 IOP Publishing Ltd.
KSP Keywords
5 nm, Channel thickness, Double layered, Ferroelectric gate, Fully depleted(FD), Gate insulator, Non-Volatile Memory(NVM), Thin-Film Transistor(TFT), VDF-TrFE, ZnO layer, ferroelectric polymer