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Journal Article Design of a Clockless MSP430 Core using Mixed Asynchronous Design Flow
Cited 4 time in scopus Share share facebook twitter linkedin kakaostory
Authors
Ziho Shin, Myeong-Hoon Oh, Jeong-Gun Lee, Hag Young Kim, Young Woo Kim
Issue Date
2017-03
Citation
IEICE Electronics Express, v.14, no.8, pp.1-12
ISSN
1349-2543
Publisher
일본, 전자정보통신학회 (IEICE)
Language
English
Type
Journal Article
DOI
https://dx.doi.org/10.1587/elex.14.20170162
Abstract
There are various limitations on the supporting tools and design methodologies for the implementation of an asynchronous delay-insensitive model. In this paper, we propose a new design flow by exploiting a mixed model, which combines a bounded delay model and a delay-insensitive model. To develop the design flow, we use an asynchronous finite-state machine for the bounded delay model and the null convention logic for the delay-insensitive model. Further, we designed an MSP430 core to verify the proposed design flow and the results of simulation show that it exhibits a performance improvement of 30.34% over its synchronous counterpart.
KSP Keywords
Bounded delay, Delay model, Delay-insensitive, Design flow, Mixed model, Supporting tools, asynchronous design, design methodology, finite state machine, null convention logic, performance improvement