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학술대회 Low Latency IFFT Design for OFDM Systems Supporting Full-Duplex FDD
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저자
장인걸, 조권도
발행일
201707
출처
International Conference on Ubiquitous and Future Networks (ICUFN) 2017, pp.642-646
DOI
https://dx.doi.org/10.1109/ICUFN.2017.7993870
협약과제
17HF1600, (통합)초연결 스마트 서비스를 위한 5G 이동통신 핵심기술개발, 정현규
초록
In this paper, we describe a low latency Inverse Fast Fourier Transform (IFFT) design method for OFDM systems supporting full-duplex Frequency Division Duplex (FDD). To support full-duplex FDD OFDM systems means that transmission and reception are simultaneously performed. In order to reduce the IFFT output latency, we propose the reordering scheme of IFFT input data. By using the reordered IFFT input data, both the output latency and the memory size in the first stage of IFFT are significantly reduced. In the OFDM systems, input data of the IFFT corresponding to guard band are assigned as null. Low latency IFFT design method is proposed based on the fact that there are many null as an input data of IFFT. The proposed method focuses on reducing the memory size in the first stage of single-path delay feedback (SDF) IFFT architectures since the first stage occupies about 50% of the overall memory. To verify the efficiency of the proposed method, 2048-point IFFT with radix-2 SDF architecture is used and reduced about 41% compared with conventional architecture.
KSP 제안 키워드
Design method, First stage, Full-Duplex(FuDu), Guard Band, Low latency, Memory size, OFDM systems, Radix-2, frequency division duplex, input data, inverse fast Fourier transform