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Conference Paper
A 1GHz Fault Tolerant Processor with Dynamic Lockstep and Self-recovering Cache for ADAS SoC Complying with ISO26262 in Automotive Electronics
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- Authors
- Jinho Han, Youngsu Kwon, Yong Cheol Peter Cho, Hoi-Jun Yoo
- Issue Date
- 2017-11
- Citation
- Asian Solid-State Circuits Conference (A-SSCC) 2017, pp.313-316
- Language
- English
- Type
- Conference Paper
- Project Code
- 17HB2500, Intelligence Many-Core Processor and SW based on Low-Power Hypervisor, Kwon Young-Su
- Abstract
- We present a processing platform that implements DMR with separate clock and power sources to prevent dependent failures working with a reconfigurable cache that includes BIST with self-recovering function to detect transient faults and error prediction to prevent permanent faults. The fault tolerant processor is analyzed to be complying with the ISO26262 SOTIF for ADAS SoC which is fabricated with 28nm CMOS Technology. The single point faults metric is 99.64% with a safety mechanism.
- KSP Keywords
- 28nm CMOS technology, Automotive electronics, Dependent failures, Fault-tolerant, Processing platform, Reconfigurable cache, Self-Recovering, Single point, Transient faults, error prediction, permanent faults