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Conference Paper Backside Via Process with Defect Free Sidewalls for GaN MMIC Applications
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Authors
Kyu Jun Cho, Byoung-Gue Min, Ho-Kyun Ahn, Haecheon Kim, Hyung-Sup Yoon, Hyun-Wook Jung, Jae-Won Do, Min Jeong Shin, Sung-Jae Chang, Jong-Won Lim, Anthony Barker, Alex Wood, Kevin Riddell, Gordon Horsley, Dave Thomas
Issue Date
2017-05
Citation
International Conference on Compound Semiconductor Manufacturing Technology (CS MANTECH) 2017, pp.1-3
Language
English
Type
Conference Paper
Project Code
17HB2400, Development of High Efficiency GaN-based Key Components and Modules for Base and Mobile Stations, Jong-Won Lim
Abstract
Backside via etch process for GaN on SiC devices was studied. Etch condition has been optimized to suppress the formation of undesirable pillars and post etch cleaning processes were applied to ensure the etch byproducts of SiC substrate and AlGaN/GaN epi layers are completely removed. Through carefully designed test steps we were able to develop a 70um diameter backside via process with defect free side walls which is critical for fabricating reliable GaN based MMICs.
KSP Keywords
Cleaning process, Defect-free, GaN on SiC, SiC device, SiC substrate, Via Etch