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학술대회
Backside Via Process with Defect Free Sidewalls for GaN MMIC Applications
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- 저자
- 조규준, 민병규, 안호균, 김해천, 윤형섭, 정현욱, 도재원, 신민정, 장성재, 임종원, Anthony Barker, Gordon Horsley, Dave Thomas, Kevin Riddell, Alex Wood
- 발행일
- 201705
- 출처
- International Conference on Compound Semiconductor Manufacturing Technology (CS MANTECH) 2017, pp.1-3
- 협약과제
- 17HB2400, 고효율 GaN 기반 기지국/단말기용 핵심부품 및 모듈 개발, 임종원
- 초록
- Backside via etch process for GaN on SiC devices was studied. Etch condition has been optimized to suppress the formation of undesirable pillars and post etch cleaning processes were applied to ensure the etch byproducts of SiC substrate and AlGaN/GaN epi layers are completely removed. Through carefully designed test steps we were able to develop a 70um diameter backside via process with defect free side walls which is critical for fabricating reliable GaN based MMICs.
- KSP 제안 키워드
- Cleaning process, Defect-free, GaN on SiC, SiC device, SiC substrate, Via Etch