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학술지 Planarised Interconnection Technology using a New Pillar Formation Method with Multi-Stacked Metal Structure
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저자
박민, 김기홍, 장진, 구진근, 남기수
발행일
199608
출처
Electronics Letters, v.32 no.18, pp.1731-1732
ISSN
1350-911X
출판사
IET
DOI
https://dx.doi.org/10.1049/el:19961143
초록
A multilevel interconnection technology using both a new pillar structure consisting of multi-stacked metal layers and chemical-mechanical polishing planarisation has been proposed. This has several advantages such as self-aligned interconnection and decreased via-pillar resistance. The via-pillar resistance becomes one third of conventional via. In addition this method can improve the planarisation capability of inter-metal dielectrics.
KSP 제안 키워드
Chemical Mechanical Polishing(CMP), Multilevel interconnection, Pillar structure, metal layer, metal structure, self-Aligned