The parallel combination of a switching and a linear amplifier in the supply modulator for RF power amplifiers (PAs) has the potential to enhance energy efficiency while achieving wider bandwidth and lower ripple output voltage. In this paper, a linear amplifier that features a buffered-switching Class-AB bias scheme is presented for the supply modulator in polar-transmitter structures achieving 500 MHz of small-signal 3-dB bandwidth at a 1.2-V supply. The linear amplifier absorbs and cancels up to 60 mA of ripple current from the switching amplifier. As such, the ripple in the output voltage of the hybrid linear-switching supply modulator is less than 7.5 mVpp. The switching amplifier provides most of the signal current for greatest efficiency owing to a proposed rail-to-rail current-sensing circuit. Current feedback in the switching amplifier achieves 1.68-MHz unity-gain bandwidth at 6-MHz switching frequency. Harmonic distortion in the output voltage of the supply modulator is below 40 dBc at 0.8 Vpp sinusoidal input up to 9 MHz. The peak efficiency is 87.7% for a 8.25- 廓 load, while the maximum output power is 23.6 dBm for a 4.99- 廓 load. The chip measures 1.35 mm2 in a 65-nm standard bulk CMOS process.
KSP Keywords
3-dB bandwidth, CMOS Process, Class AB(CAB), Current feedback, Current-Sensing Circuit, Energy efficiency, Gain bandwidth, Harmonic Distortion, MHz bandwidth, MHz switching frequency, Output Voltage
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