상세정보
학술지
Visible Light-Erasable Oxide FET-Based Nonvolatile Memory Operated with a Deep Trap Interface
- 발행일
- 201808
- 출처
- ACS Applied Materials & Interfaces, v.10 no.31, pp.26405-26412
- ISSN
- 1944-8244
- 출판사
- American Chemical Society(ACS)
- 협약과제
- 17HB1300, 차세대 신기능 스마트디바이스 플랫폼을 위한 대면적 이차원소재 및 소자 원천기술 개발, 윤선진
- 초록
- A new concept of a tunneling oxide-free nonvolatile memory device with a deep trap interface floating gate is proposed. This device demonstrates a high on/off current ratio of 107 and a sizable memory window due to deep traps at the interface between the channel and gate dielectric layers. Interestingly, irradiation with 400 nm light can completely restore the program state to the initial one (performing an erasing process), which is attributed to the visible light-sensitive channel layer. Device reproducibility is enhanced by selectively passivating shallow traps at the interface using in situ H2 plasma treatment. The passivated memory device shows highly reproducible memory operation and on-state current during retention bake tests at 85 °C. One of the most significant advantages of this visible light-erasable oxide field-effect transistor-based nonvolatile memory is its simple structure, which is free from deterioration due to the frequent tunneling processes, as compared to conventional nonvolatile memory devices with tunneling oxides.
- KSP 제안 키워드
- AND gate, Channel layer, Deep traps, Field-effect transistors(FETs), Floating gate, Light-sensitive, Non-Volatile Memory(NVM), Nonvolatile memory devices, ON/OFF current ratio, Oxide field, Oxide-free