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Journal Article
TEI-ULP: Exploiting Body Biasing to Improve the TEI-Aware Ultralow Power Methods
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- Authors
- Woojoo Lee, Taewook Kang, Jae-Jin Lee, Kyuseung Han, Joongheon Kim, Massoud Pedram
- Issue Date
- 2019-09
- Citation
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, v.38, no.9, pp.1758-1770
- ISSN
- 0278-0070
- Publisher
- IEEE
- Language
- English
- Type
- Journal Article
- Abstract
- Temperature effect inversion (TEI) phenomenon in ultralow power (ULP) very large scale integration circuits has been identified as an important effect by both academia and industry. Although a number of ULP methods that attempt to exploit the TEI phenomenon have been proposed, the small size of the design exploration space when applying these methods to ULP circuits hinders them from achieving their full potential. This is mainly due to the limited granularity of the supply voltage level control. Starting with an intuition that the body biasing (BB) technique is a key to overcome this limitation, this paper exploits the BB technique along with the TEI-aware voltage scaling (TEI-VS) method and TEI-aware frequency scaling (TEI-FS) method, so as to substantially increase the design spaces of these methods. Techniques for optimally combining the BB technique with TEI-VS and TEI-FS are introduced. Simulation results with the latest commercial CMOS process technologies for ULP designs demonstrate the effectiveness of the proposed methodology.
- KSP Keywords
- CMOS Process, Design Exploration, Design space, Frequency Scaling, Level Control, Supply voltage, Temperature effect inversion(TEI), Ultra-low power(ULP), Voltage Scaling, Voltage level, body biasing