상세정보
학술지
High-Efficiency CMOS Power Amplifier using Uneven Bias for Wireless LAN Application
- 발행일
- 201212
- 출처
- ETRI Journal, v.34 no.6, pp.885-891
- ISSN
- 1225-6463
- 출판사
- 한국전자통신연구원 (ETRI)
- 협약과제
- 12MI1300, 차세대 이동통신 기지국용 Class-S 전력증폭기 기술 연구, 정재호
- 초록
- This paper proposes a high-efficiency power amplifier (PA) with uneven bias. The proposed amplifier consists of a driver amplifier, power stages of the main amplifier with class AB bias, and an auxiliary amplifier with class C bias. Unlike other CMOS PAs, the amplifier adopts a current-mode transformer-based combiner to reduce the output stage loss and size. As a result, the amplifier can improve the efficiency and reduce the quiescent current. The fully integrated CMOS PA is implemented using the commercial Taiwan Semiconductor Manufacturing Company 0.18-μm RF-CMOS process with a supply voltage of 3.3 V. The measured gain, P1dB, and efficiency at P1dB are 29 dB, 28.1 dBm, and 37.9%, respectively. When the PA is tested with 54 Mbps of an 802.11g WLAN orthogonal frequency division multiplexing signal, a 25-dB error vector magnitude compliant output power of 22 dBm and a 21.5% efficiency can be obtained. © 2012 ETRI.