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Journal Article High-Efficiency CMOS Power Amplifier using Uneven Bias for Wireless LAN Application
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Authors
Namsik Ryu, Jae-Ho Jung, Youngchae Jeong
Issue Date
2012-12
Citation
ETRI Journal, v.34, no.6, pp.885-891
ISSN
1225-6463
Publisher
한국전자통신연구원 (ETRI)
Language
English
Type
Journal Article
DOI
https://dx.doi.org/10.4218/etrij.12.1812.0024
Abstract
This paper proposes a high-efficiency power amplifier (PA) with uneven bias. The proposed amplifier consists of a driver amplifier, power stages of the main amplifier with class AB bias, and an auxiliary amplifier with class C bias. Unlike other CMOS PAs, the amplifier adopts a current-mode transformer-based combiner to reduce the output stage loss and size. As a result, the amplifier can improve the efficiency and reduce the quiescent current. The fully integrated CMOS PA is implemented using the commercial Taiwan Semiconductor Manufacturing Company 0.18-μm RF-CMOS process with a supply voltage of 3.3 V. The measured gain, P1dB, and efficiency at P1dB are 29 dB, 28.1 dBm, and 37.9%, respectively. When the PA is tested with 54 Mbps of an 802.11g WLAN orthogonal frequency division multiplexing signal, a 25-dB error vector magnitude compliant output power of 22 dBm and a 21.5% efficiency can be obtained. © 2012 ETRI.
KSP Keywords
3 V, CMOS PA, CMOS Process, CMOS power amplifier, Class AB(CAB), Class-C, Current-mode(CM), Driver Amplifier, Fully integrated, Main amplifier, Mode transformer