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학술지 Comparison of Trapped Charges and Hysteresis Behavior in hBN Encapsulated Single MoS2 Flake based Field Effect Transistors on SiO2 and hBN Substrates
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이창희, 라티서빈, 무하메드칸, 임동석, 김윤섭, 윤선진, 윤두협, 와타나베겐지, 다쿠치다까시, 김길호
Nanotechnology, v.29 no.33, pp.1-8
Institute of Physics (IOP)
18HB1100, 차세대 신기능 스마트디바이스 플랫폼을 위한 대면적 이차원소재 및 소자 원천기술 개발, 윤선진
Molybdenum disulfide (MoS2) based field effect transistors (FETs) are of considerable interest in electronic and opto-electronic applications but often have large hysteresis and threshold voltage instabilities. In this study, by using advanced transfer techniques, hexagonal boron nitride (hBN) encapsulated FETs based on a single, homogeneous and atomic-thin MoS2 flake are fabricated on hBN and SiO2 substrates. This allows for a better and a precise comparison between the charge traps at the semiconductor-dielectric interfaces at MoS2-SiO2 and hBN interfaces. The impact of ambient environment and entities on hysteresis is minimized by encapsulating the active MoS2 layer with a single hBN on both the devices. The device to device variations induced by different MoS2 layer is also eliminated by employing a single MoS2 layer for fabricating both devices. After eliminating these additional factors which induce variation in the device characteristics, it is found from the measurements that the trapped charge density is reduced to 1.9 × 1011 cm-2 on hBN substrate as compared to 1.1 × 1012 cm-2 on SiO2 substrate. Further, reduced hysteresis and stable threshold voltage are observed on hBN substrate and their dependence on gate sweep rate, sweep range, and gate stress is also studied. This precise comparison between encapsulated devices on SiO2 and hBN substrates further demonstrate the requirement of hBN substrate and encapsulation for improved and stable performance of MoS2 FETs.
KSP 제안 키워드
AND gate, Boron nitride(BN), Device characteristics, Device to Device(D2D), Device variations, Field effect transistors(Substrate temperature), Hexagonal boron nitride(h-BN), Optoelectronic applications, Semiconductor-dielectric interfaces, Sweep rate, Trapped charge density