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학술지 Low-phase-noise Self-sustaining Amplifier IC with Parallel Capacitance Cancellation for Low-Q Piezoelectric Resonator
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저자
김형섭, 이변철, 고영운, 문영진, 김이경, 이현중, 고형호
발행일
201905
출처
Microsystem Technologies, v.25 no.5, pp.2041-2050
ISSN
0946-7076
출판사
Springer
DOI
https://dx.doi.org/10.1007/s00542-018-3830-5
협약과제
18ZB1200, 임플란터블 능동 전자소자 원천기술 개발, 이정익
초록
In this paper, a low-phase-noise self-sustaining amplifier IC with parallel capacitance cancellation for low-Q piezoelectric resonator is presented. The target of the proposed low-phase-noise self-sustaining amplifier IC is a mass-sensitive oscillator based on an AlN piezoelectric nanoresonator in liquid media. The behavioral model of the AlN piezoelectric nanoresonator is modeled as a damped second-order mass-spring-damper system with Verilog-A. The Verilog-A model enables the co-simulation of the oscillator nanosystem including the electronic sustaining amplifier circuit and the piezoelectric nanoresonator. The sustaining amplifier consists of two parts: transimpedance amplifier and shunt-capacitance cancelling amplifier. The shunt-capacitance cancellation and self-sustaining oscillation are critical in low-Q resonators, such as a mass sensor in liquid media. The shunt-capacitance-cancelling amplifier, which is a parasitic capacitance-canceller, supplies an inverted driving voltage to the nanoresonator to remove the wrong oscillation condition arising from the capacitance parallel to the nanoresonator. Near the resonant frequency, the motional inductance and motional capacitance of the nanoresonator are mutually cancelled, and the motional resistance are converted to the output voltage of the transimpedance amplifier. To remove the unwanted high-frequency poles, the amplifiers are designed using an inverter-based high-speed architecture with a 3혻GHz gain-bandwidth product. In this oscillator system, when the target mass is attached to the nanoresonator, the inductance is increased; thus, the oscillation frequency is decreased. The operation of the full nanosystem is modeled and simulated using the Verilog-A behavioral model. The nominal output frequency is 5혻MHz. The power consumption is 5혻mA with 1.8혻V supply voltage.
KSP 제안 키워드
Amplifier circuit, Behavioral model, Co-simulation, Damper system, High Frequency(HF), High Speed, Inverter-based, Liquid Media, Low phase noise, Mass sensor, Motional resistance