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Journal Article
MMNoC: Embedding Memory Management Units into Network-on-Chip for Lightweight Embedded Systems
- Authors
- Hyeonguk Jang, Kyuseung Han, Sukho Lee, Jae-Jin Lee, Woojoo Lee
- Issue Date
- 2019-06
- Citation
- IEEE Access, v.7, pp.80011-80019
- ISSN
- 2169-3536
- Publisher
- IEEE
- Language
- English
- Type
- Journal Article
- Abstract
- With the advent of the Internet-of-Things (IoT) era, the demand for lightweight embedded systems is rapidly increasing. So far, ultra-low power (ULP) processors have been leading the development of lightweight embedded systems. However, as the IoT era gets more sophisticated, existing ULP processors are expected to reach a critical limit in the absence of a memory management unit (MMU) in that multiple programs cannot be run in the MMU-less embedded systems. To tackle this issue, we propose an architecture in which the MMU is embedded in a network-on-chip (NoC). Through the proposed approach, NoC offers MMU functionality without modifying the processor design, allowing developers to easily leverage the existing ULP lightweight processors and build embedded systems that support multiprocessing. In this paper, along with the details of the proposed MMU-embedded NoC (MMNoC) design, a prototype platform including the MMNoC and dual RISC-V processors is provided. The prototype platform is synthesized with FPGA and Samsung 28nm FD-SOI technology to verify the functional accuracy and small performance, area, and power overhead of the MMNoC.
- KSP Keywords
- 28nm FD-SOI, Internet of thing(IoT), MMU-less embedded systems, Memory management Unit, Network on Chip(NoC), RISC-V, SOI technology, Ultralow power(ULP), processor design
This work is distributed under the term of Creative Commons License (CCL)
(CC BY)
(CC BY)
