상세정보
학술대회
1.8V-to-1.0V CMOS 65 nm MIPI RFFE Interface Circuit for Millimeter-wave Beamforming Array
- 발행일
- 201902
- 출처
- International Conference on Advanced Communications Technology (ICACT) 2019, pp.120-123
- 협약과제
- 18HF1500, 5G 이동통신용 밀리미터파(40GHz 이하) 빔포밍 부품 개발, 김광선
- 초록
- A 1.8V MIPI RF front-end (RFFE) circuit for a slave with a 1.0V supply is designed using a CMOS 65 nm process as a control block for a millimeter-wave beamforming array. It is consisted of a MIPI RFFE slave logic, power-on-reset (PoR), SCLK receiver, and SDATA transceiver to support the MIPI RFFE master-slave interface with MIPI RFFE bus. According to simulation results, the designed MIPI RFFE interface circuit provides rise and fall time of less than 3.3 ns with a 26 pF load (one master-eight slave configuration) at the transmission rate of 26 MHz, satisfying the requirement of 6.5 ns in the MIPI RFFE specification version 1.10.
- KSP 제안 키워드
- 6 MHz, Beamforming array, CMOS 65 nm, Control block, Interface circuit, Master-slave, Power-On-Reset, RF front end, Transmission Rate, Wave beamforming, fall time