상세정보
학술지
Signal Integrity Analysis of System Interconnection Module of High-density Server Supporting Serial RapidIO
- 발행일
- 201910
- 출처
- ETRI Journal, v.41 no.5, pp.670-683
- ISSN
- 1225-6463
- 출판사
- 한국전자통신연구원 (ETRI)
- 협약과제
- 19HS3500, 메모리 중심 차세대 컴퓨팅 시스템 구조 연구, 오명훈
- 초록
- In this paper, we analyzed the signal integrity of a system interconnection module for a proposed high-density server. The proposed server integrates several components into a chassis. Therefore, the proposed server can access multiple computing resources. To support the system interconnection, among the highly integrated computing resources, the interconnection module, which is based on Serial RapidIO, has been newly adopted and supports a bandwidth of 800 Gbps while routing 160 differential signal traces. The module was designed for two different stack-up types on a printed circuit board. Each module was designed into 12- (version 1) and 14-layer (version 2) versions with thicknesses of 1.5T and 1.8T, respectively. Version 1 has a structure with two consecutive high-speed signal-layers in the middle of two power planes, whereas Version 2 has a single high-speed signal placed only in the space between two power planes. To analyze the signal integrity of the module, we probed the S-parameters, eye-diagrams, and crosstalk voltages. The results show that the high-speed signal integrity of Version 2 has a better quality than Version 1, even if the signal trace length is increased.
- KSP 제안 키워드
- Computing resources, High Speed, High-density, Integrated computing, Serial RapidIO, Signal Integrity(SI), Space between, System interconnection, differential signal, printed circuit board(PCB), scattering parameters(S-parameters)
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