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학술지 Noninverting Buck-Boost DC-DC Converter Using a Duobinary-Encoded Single-Bit Delta-Sigma Modulator
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저자
조영균, 이광천
발행일
202001
출처
IEEE Transactions on Power Electronics, v.35 no.1, pp.484-495
ISSN
0885-8993
출판사
IEEE
DOI
https://dx.doi.org/10.1109/TPEL.2019.2913404
협약과제
18HF1600, [전문연구실] 초고주파 이동통신 무선백홀 전문연구실, 김태중
초록
This paper presents a delta-sigma modulation (DSM) control scheme for noninverting buck-boost (NIBB) converter that features a duobinary encoding for four power switch controls. The proposed scheme converts the single-bit output of the modulator into a 1.5-b signal to enable a three-phase operation comprising the charging, bypassing, and discharging phases. This control method reduces both switching and conduction losses by changing only two switches in each period, thus, achieving high conversion efficiency. A smooth mode transition is provided by the DSM controller, which automatically and continuously determines the operating mode of the converter. Thus, the dead zone can be effectively released with improved transient responses. Furthermore, the spurious tones in the output are effectively eliminated by the robust noise shaping capability of the modulator. The proposed DSM-based NIBB converter was implemented on a 180-nm CMOS. It regulated the output in the range of 2.0-4.6 V with input voltage of 2.5-5.0 V, and the maximal load current was 500 mA. The converter showed a peak efficiency of 94.8% at 90-mA load and the output voltage ripples were maintained under 18 mV. A low noise floor with the first spurious peak located-92 dBc below the signal was achieved across all mode operations. In addition, the converter occupied a small chip area of 1.51 mm2.
KSP 제안 키워드
180-nm CMOS, Chip area, Control scheme, Conversion efficiency(C.E.), Dead Zone, Delta-Sigma Modulation, Delta-Sigma Modulator, High conversion efficiency, Input voltage, Load current, Low noise