상세정보
학술지
초저지연 제어를 위한 CPS 아키텍처 설계
- 발행일
- 201910
- 출처
- 대한임베디드공학회논문지, v.14 no.5, pp.227-237
- ISSN
- 1975-5066
- 출판사
- 대한임베디드공학회
- 협약과제
- 19MS1100, (초저지연-총괄/1세부)저지연 융합서비스를 위한 모바일 에지 컴퓨팅 플랫폼 기술 개발, 전인걸
- 초록
- Ultra-low latency control is one of the characteristics of 5G cellular network services, which means that the control loop is handled in milliseconds. To achieve this, it is necessary to identify time delay factors that occur in all components related to CPS control loop, including new 5G cellular network elements such as MEC, and to optimize CPS control loop in real time. In this paper, a novel CPS architecture for ultra-low latency control of CPS is designed. We first define the ultra-low latency characteristics of CPS and the CPS concept model, and then propose the design of the control loop performance monitor (CLPM) to manage the timing information of CPS control loop. Finally, a case study of MEC-based implementation of ultra-low latency CPS reviews the feasibility of future applications.
- KSP 제안 키워드
- 5G cellular networks, CPS architecture, Case studies, Concept model, Future applications, Latency control, Network service, Performance Monitor, Real-Time, Time Delay, control loop