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Conference Paper
AlGaN/GaN 이종접합 구조의 게이트 영역 미세 조절 리세스를 이용한 상시불통형 전계효과 트랜지스터
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- Issue Date
- 2019-11
- Citation
- 대한전자공학회 학술 대회 (추계) 2019, pp.215-218
- Publisher
- 대한전자공학회
- Language
- Korean
- Type
- Conference Paper
- Abstract
- In this work, we fabricated normally-off FETs using gate recess techniques with extremely low rate dry etching conditions. We report also, a relationship between the VSUBth/SUB-shift and the recess depth under the gate area of FETs on AlGaN/GaN heterostructure. We confirmed also extremely low etching rate of 0.025 nm/s or 1.5 nm/min using Cl₂-based inductively coupled plasma etching process. Devices with different recess depths were fabricated, and determined the dependence of recess depth on VSUBth/SUB-shift. Without any etching-stop layers, it was achieved well targeted and good controlled recess depth under the gate region. With the extremely low rated dry etching conditions, we fabricated normally-off AlGaN/GaN FETs with high positive VSUBth/SUB of +5.64 V and the off-state leakage current as ~10SUP-6/SUP A/mm.
- KSP Keywords
- 5 nm, AlGaN/GaN heterostructure, Etching conditions, GaN FET, Gate recess, Inductively coupled plasma etching, Inductively-coupled plasma(ICP), Leakage current, Low-rate, Normally-Off, Off-state leakage