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Journal Article A 2.6-GHz Partial-Envelope Delta–Sigma-Digitized Carrier-Bursting Transmitter
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Authors
Seunghyun Jang, Youngho Seo, Changwan Kim, Jaeho Jung, Bonghyuk Park, Kwang-Seon Kim, Kwang-Chun Lee
Issue Date
2020-07
Citation
IEEE Microwave and Wireless Components Letters, v.30, no.7, pp.697-700
ISSN
1531-1309
Publisher
IEEE
Language
English
Type
Journal Article
DOI
https://dx.doi.org/10.1109/LMWC.2020.2998483
Abstract
This letter presents the implementation and measurement results of a partially digitized envelope-based carrier-bursting transmitter operating at 2.6 GHz. The transmitter consists of two chips, in this case: a partial-envelope delta-sigma modulator (PEDSM) and an up-conversion mixer with 130-nm CMOS technology. A second-order continuous-time delta-sigma modulator with a 622-MHz sampling clock is designed as an envelope digitizer in the PEDSM. With a long-term evolution signal with a peak-to-average power ratio of 8.7 dB, the fabricated transmitter showed a coding efficiency of 90.4% and an error vector magnitude (EVM) of 3.44% for a PEDSM threshold level of 1/3.
KSP Keywords
2.6 GHz, CMOS Technology, Coding efficiency, Continuous-time delta-sigma modulator, Long Term Evolution(LTE), Peak to average Power ratio(PAPR), Sampling clock, error vector magnitude(EVM), measurement results, second-order, threshold level