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Journal Article
Exploiting Defective RRAM Array as Synapses of HTM Spatial Pooler with Boost-factor Adjustment Scheme for Defect-tolerant Neuromorphic Systems
- Authors
- Jiyong Woo, Tien Van N guyen, Jeong Hun Kim, Jong-Pil Im, Solyee Im, Yeriaron Kim, Kyeong-Sik Min, Seung Eon Moon
- Issue Date
- 2020-07
- Citation
- Scientific Reports, v.10, pp.1-8
- ISSN
- 2045-2322
- Publisher
- Nature Research
- Language
- English
- Type
- Journal Article
- Project Code
- 19ZB1800, Development of Neuromorphic Hardware by using High Performance Memristor Device based on Ulta-thin Film Structure, Moon Seungeon
- Abstract
- A crossbar array architecture employing resistive switching memory (RRAM) as a synaptic element accelerates vector?뱈atrix multiplication in a parallel fashion, enabling energy-efficient pattern recognition. To implement the function of the synapse in the RRAM, multilevel resistance states are required. More importantly, a large on/off ratio of the RRAM should be preferentially obtained to ensure a reasonable margin between each state taking into account the inevitable variability caused by the inherent switching mechanism. The on/off ratio is basically adjusted in two ways by modulating measurement conditions such as compliance current or voltage pulses modulation. The latter technique is not only more suitable for practical systems, but also can achieve multiple states in low current range. However, at the expense of applying a high negative voltage aimed at enlarging the on/off ratio, a breakdown of the RRAM occurs unexpectedly. This stuck-at-short fault of the RRAM adversely affects the recognition process based on reading and judging each column current changed by the multiplication of the input voltage and resistance of the RRAM in the array, degrading the accuracy. To address this challenge, we introduce a boost-factor adjustment technique as a fault-tolerant scheme based on simple circuitry that eliminates the additional process to identify specific locations of the failed RRAMs in the array. Spectre circuit simulation is performed to verify the effect of the scheme on Modified National Institute of Standards and Technology dataset using convolutional neural networks in non-ideal crossbar arrays, where experimentally observed imperfective RRAMs are configured. Our results show that the recognition accuracy can be maintained similar to the ideal case because the interruption of the failure is suppressed by the scheme.
- KSP Keywords
- Compliance current, Convolution neural network(CNN), Current range, Input voltage, Low current, Multilevel resistance, National Institute of Standards and Technology, Negative voltage, Non-ideal, Pattern recognition, RRAM array
This work is distributed under the term of Creative Commons License (CCL)
(CC BY)
(CC BY)
