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Conference Paper
Switching and Heat-dissipation Performance Analysis of an LTCC-based Leadless Surface Mount Package Using a Power Factor Correction Converter
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- Authors
- Dong Yun Jung, Hyun Gyu Jang, Doohyung Cho, Sungkyu Kwon, Jong Il Won, Seong Hyun Lee, Kun Sik Park, Jong-Won Lim, Yong Ha Lee
- Issue Date
- 2021-02
- Citation
- International Conference on Electronics, Information and Communication (ICEIC) 2021, pp.811-813
- Language
- English
- Type
- Conference Paper
- Abstract
- We propose a low-temperature co-fired ceramic (LTCC)-based leadless surface mount package to improve switching and heat-dissipation properties of a power semiconductor. A silicon carbide (SiC) Schottky barrier diode (SBD) bare die is embedded to a cavity in the LTCC-based multi-layer substrate. Instead of conventional aluminum wires, a flat copper clip is used to reduce parasitic inductance and electrical resistance caused by bond wires. Multiple vias filled with silver are embedded in the multi-layer substrate to decrease the electrical resistance and to improve heat-dissipation of the package. The measured reverse recovery charge (Qrr) was 18.02 nC at a reverse voltage of 300 V and $di/dt$ of $300\ \mathrm{A}/\mu\mathrm{s}$. It exhibits 18.7% improvement in the Qrr as compared to the conventional TO-220 packaged product using the same bare die. The power loss and heat-dissipation performances of the proposed package was evaluated through a power factor correction (PFC) converter. In comparison with commercial products, we can see that the proposed package has low-loss and high heat-dissipation properties.
- KSP Keywords
- Commercial products, Electrical resistance, Low loss, Low temperature cofired ceramics(LTCC), Multi-layer substrate, Parasitic inductance, Performance analysis, Power factor(P.F), Power factor correction (PFC) converter, Power semiconductor, Reverse voltage