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Conference Paper
Verification of Interconnect RTL Code for Memory-Centric Computing using UVM
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- Authors
- Hyuk Je Kwon, Myeong-Hoon Oh, Won-ok Kwon
- Issue Date
- 2021-02
- Citation
- International Conference on Electronics, Information and Communication (ICEIC) 2021, pp.861-864
- Language
- English
- Type
- Conference Paper
- Abstract
- This document is about the verification of an interconnect (i.e. switch) RTL code that is based on Gen-Z protocol using Universal Verification Methodology (UVM). Ports in the switch for transmission packets are connected to virtual interfaces with UVM. The packets that are generated in the UVM environment are transmitted into the ports of the switch through the virtual interfaces. For verifying the switch logic, we designed sequence items and a virtual sequencer and simulated it.
- KSP Keywords
- Universal verification methodology(UVM), memory-centric computing, switch logic