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Journal Article GaAs on Si substrate with dislocation filter layers for wafer‐scale integration
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Authors
HoSung Kim, Tae-Soo Kim, Shinmo An, Duk-Jun Kim, Kap Joong Kim, Young-Ho Ko, Joon Tae Ahn, Won Seok Han
Issue Date
2021-10
Citation
ETRI Journal, v.43, no.5, pp.909-915
ISSN
1225-6463
Publisher
한국전자통신연구원 (ETRI)
Language
English
Type
Journal Article
DOI
https://dx.doi.org/10.4218/etrij.2021-0003
Abstract
GaAs on Si grown via metalorganic chemical vapor deposition is demonstrated using various Si substrate thicknesses and three types of dislocation filter layers (DFLs). The bowing was used to measure wafer-scale characteristics. The surface morphology and electron channeling contrast imaging (ECCI) were used to analyze the material quality of GaAs films. Only 3-μm bowing was observed using the 725-μm-thick Si substrate. The bowing shows similar levels among the samples with DFLs, indicating that the Si substrate thickness mostly determines the bowing. According to the surface morphology and ECCI results, the compressive strained indium gallium arsenide/GaAs DFLs show an atomically flat surface with a root mean square value of 1.288 nm and minimum threading dislocation density (TDD) value of 2.4 × 107 cm?닋2. For lattice-matched DFLs, the indium gallium phosphide/GaAs DFLs are more effective in reducing the TDD than aluminum gallium arsenide/GaAs DFLs. Finally, we found that the strained DFLs can block propagate TDD effectively. The strained DFLs on the 725-μm-thick Si substrate can be used for the large-scale integration of GaAs on Si with less bowing and low TDD.
This work is distributed under the term of Korea Open Government License (KOGL)
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