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Conference Paper Formal Requirement Specification Method for Quality Assurance of Discrete Event Simulation Software
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Authors
Sooyoung Jang, Changbeom Choi
Issue Date
2021-12
Citation
Asia Simulation Conference (AsiaSim) 2021, pp.195-200
Language
English
Type
Conference Paper
Abstract
As the simulation models are getting more complex, their requirement specifications are also getting more complicated. As a result, the specification method for a simulation model should have sufficient expression power to develop the specification and be easy to develop. To give concrete and concise requirement specifications, the researchers have utilized temporal logic to give formal specifications. The temporal logic captures the temporal behavior and utilizes the propositional or predicate logic statements to describe the safety or liveness conditions. This paper proposes Discrete Event System (DEVS) formalism as a requirement specification method. Since DEVS formalism has set-theoretic characteristics, a researcher may develop their requirements in a modular form. Also, DEVS formalism has the abstract simulator algorithm. Therefore, the model which represents the requirements may be executed with other simulation models to check the requirements.
KSP Keywords
DEVS formalism, Discrete Event(DE), Discrete Event Systems, Formal specifications, Predicate logic, Requirement specifications, Simulation Model, Simulation software, Temporal behavior, Temporal logic, discrete event simulation(DES)