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Journal Article Double-Gate and Body-Contacted Nonvolatile Oxide Memory Thin-Film Transistors for Fast Erase Programming
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Authors
Jong-Heon Yang, Chun-Won Byun, Jae-Eun Pi, Hee-Ok Kim, Chi-Sun Hwang, Seunghyup Yoo
Issue Date
2022-01
Citation
IEEE Transactions on Electron Devices, v.69, no.1, pp.120-126
ISSN
0018-9383
Publisher
IEEE
Language
English
Type
Journal Article
DOI
https://dx.doi.org/10.1109/TED.2021.3130011
Abstract
In this study, we present programming speed enhancement in amorphous oxide semiconductor memory thin-film transistor (TFT). We developed a nonvolatile memory transistor based on InZnSnO back-channel-etch TFT with InGaZnO charge storage layer inserted between gate insulators. We proposed double-gate (DG) and body-contacted (BC) memory structure to improve memory erase speed, which is the most important issue in oxide memory TFTs. DG memory did not show sufficient improvement due to large voltage drop in second gate insulator. BC memory, which can control back-channel potential directly, showed significant improvement on memory program/erase speed.
KSP Keywords
Channel potential, Charge storage, Double-gate(DG), Gate insulator, Memory structure, Non-Volatile Memory(NVM), Thin-Film Transistor(TFT), Voltage Drop, amorphous oxide semiconductor, back-channel etch, semiconductor memory