상세정보
학술대회
A 1 V 6-bit 2.4 GS/s Nyquist CMOS DAC for UWB Systems
- 발행일
- 201005
- 출처
- International Microwave Symposium (IMS) 2010, pp.912-915
- 협약과제
- 09MB2100, 45nm급 혼성 SoC용 아날로그 회로기술, 권종기
- 초록
- A 6-bit 2.4 GS/s current-steering DAC fabricated in a 65 nm CMOS technology for ultra-wideband (UWB) systems is presented. T he prototype achieves a measured spurious-free dynamic range (SFDR) of more than 36 dB over the Nyquist bandwidth at 2.4 GS/s. Among the 50 measured samples, DNL/ INL of 0.02/0.02 LSB was the lowest achievable value. T he DAC core occupies an area of merely 0.023 mm2 through simplified circuit and careful layout. To operate from a relatively low analog power supply of 1 V, a portion of current cell is implemented using low threshold voltage devices. Total maximum power consumption, including the low voltage differential signaling (LVDS) stage, is 14 mW at 2.4 GS/s. © 2010 IEEE.
- KSP 제안 키워드
- 65nm CMOS, CMOS Technology, Low Voltage Differential Signaling(LVDS), Power Consumption, UWB system, Ultra-Wide Band(UWB), current-steering DAC, low threshold voltage, maximum power, power supply, spurious-free dynamic range(SFDR)