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Conference Paper
A Full HD High Profile H.264/AVC Hardware Codec Design with Fast Motion Estimation and Compensation
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- Authors
- Suk Ho Lee, Seug Hyun Cho, Nak Woong Eum
- Issue Date
- 2010-07
- Citation
- International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC) 2010, pp.139-142
- Publisher
- IEEE
- Language
- English
- Type
- Conference Paper
- Abstract
- We designed a full HD 1080p H.264/AVC high profile hardware codec with fast motion estimation for inter prediction and high speed motion compensation. Most processing cycles are occupied with motion estimation (ME) and motion compensation (MC) that access external frame memory to fetch samples, which degrades the performance of the codec. A pixel subsampling ME and integer-fractional shared search memory architecture can solve these problems in encoder. Also, cache based motion compensation minimizes memory access in decoder. The implemented H.264/AVC codec designed with 64-bit memory bus system. And luma and chroma pixels are interleaved to fetch in the unit of doubles word to operate burst mode in this memory bus system respectively. Its total gate count is 1,190k, and internal SRAM size is 113 kB.
- KSP Keywords
- Burst-mode, Fast motion estimation, Frame memory, H.264/AVC codec, High Speed, Memory Access, Memory architecture, Motion Compensation(MoCo), Motion estimation(ME), Pixel subsampling, bus system