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Journal Article Technique for fast triangular chirp modulation in FMCW PLL
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Authors
Han Gil Choi, Sang Heung Lee, Seong Hwan Cho
Issue Date
2022-07
Citation
IEICE Electronics Express, v.19, no.14, pp.1-4
ISSN
1349-2543
Publisher
일본, 전자정보통신학회 (IEICE)
Language
English
Type
Journal Article
DOI
https://dx.doi.org/10.1587/elex.19.20220214
Abstract
Frequency-modulated continuous-wave (FMCW) radars necessitate fast frequency modulation. However, finite loop bandwidth of a phase-locked loop (PLL) limits the accuracy of fast frequency modulation. This paper proposes a phase compensation (PC) technique to address this limitation. The synthesizer PLL with the PC technique realizes fast and precise triangular chirp modulation by adding a compensating square wave phase before the integral path of the loop filter. The synthesizer is designed in 130-nm SiGe BiCMOS technology. Simulation results show rms frequency error improvement of 18 times over conventional PLL with a chirp bandwidth of 2.56GHz and 20 μs chirp period at 94 GHz.
KSP Keywords
130-nm SiGe BiCMOS, 94 GHz, Chirp modulation, Frequency modulated continuous wave (FMCW) radar, Frequency-modulation(FM), SiGe BiCMOS technology, continuous wave(CW), frequency error(FE), loop bandwidth, loop-filter(LF), phase compensation