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Conference Paper A K-band CMOS Power Amplifier with 3-Bit Phase Shifting Characteristics
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Authors
Hui Dong Lee, Seunghyun Jang, Sunwoo Kong, Bonghyuk Park, Seok-Bong Hyun
Issue Date
2022-10
Citation
International SoC Design Conference (ISOCC) 2022, pp.378-379
Publisher
IEEE
Language
English
Type
Conference Paper
DOI
https://dx.doi.org/10.1109/ISOCC56007.2022.10031345
Abstract
A 22-GHz variable phase power amplifier(VPPA) is implemented with a CMOS 65-nm general GP process. The VPPA consists of two stages. The first stage is a common source structure with a Class-A operating point, and the second stage is a cascode CMOS amplifier with a Class-AB operating point. This is a form that can use a power supply voltage of 2.2V, and as a result, higher output power can be realized. The gain can be increased by using a drive amplifier with a Class-A operating point. The integrated design is implemented by matching the chip to 50 ohms along with the drive and power amplifiers. The fabricated amplifier occupies an area of 0.92 X 0.52 mm 2 . It exhibits 17 dBm saturation output power with over 20 dB gain.
KSP Keywords
2 mm, CMOS amplifier, CMOS power amplifier, Cascode CMOS, Class AB(CAB), First stage, Operating point, Output power, Source structure, Supply voltage, Variable Phase