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Journal Article Distributed memory access architecture and control for fully disaggregated datacenter network
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Authors
Kyeong-Eun Han, Ji Wook Youn, Jongtae Song, Dae-Ub Kim, Joon Ki Lee
Issue Date
2022-12
Citation
ETRI Journal, v.44, no.6, pp.1020-1033
ISSN
1225-6463
Publisher
한국전자통신연구원 (ETRI)
Language
English
Type
Journal Article
DOI
https://dx.doi.org/10.4218/etrij.2021-0335
Abstract
In this paper, we propose novel disaggregated memory module (dMM) architecture and memory access control schemes to solve the collision and contention problems of memory disaggregation, reducing the average memory access time to less than 1혻μs. In the schemes, the distributed scheduler in each dMM determines the order of memory read/write access based on delay-sensitive priority requests in the disaggregated memory access frame (dMAF). We used the memory-intensive first (MIF) algorithm and priority-based MIF (p-MIF) algorithm that prioritize delay-sensitive and/or memory-intensive (MI) traffic over CPU-intensive (CI) traffic. We evaluated the performance of the proposed schemes through simulation using OPNET and hardware implementation. Our results showed that when the offered load was below 0.7 and the payload of dMAF was 256 bytes, the average round trip time (RTT) was the lowest, ~0.676 μs. The dMM scheduling algorithms, MIF and p-MIF, achieved delay less than 1 μs for all MI traffic with less than 10% of transmission overhead.
KSP Keywords
Average memory access time, CPU-intensive, Control scheme, Data Center Networks, Distributed scheduler, Hardware implementation, Memory intensive, Priority-Based, Round-trip time(RTT), Scheduling algorithm, access control
This work is distributed under the term of Korea Open Government License (KOGL)
(Type 4: : Type 1 + Commercial Use Prohibition+Change Prohibition)
Type 4: