상세정보
학술지
Asynchronous Deterministic Network Based on the DiffServ Architecture
- 발행일
- 202202
- 출처
- IEEE Access, v.10, pp.15068-15083
- ISSN
- 2169-3536
- 출판사
- IEEE
- 협약과제
- 22HH8300, 종단간 초정밀 네트워크 기술 개발, 김선미
- 초록
- In this study, we propose a scalable framework that guarantees both latency and jitter bounds in large networks, including the Internet. The framework is composed of two parts: a latency-guaranteeing network and a jitter-guaranteeing end system. For latency bounds, we suggest regulators per class per input-output port pair of the DiffServ-type relay nodes. For jitter bounds, based on the guaranteed latency bounds, we suggest time-stamping and buffers at the network egress edge. The framework does not require network-wide time synchronization, frequency synchronization, flow state maintenance, or flow-level queuing/scheduling. Therefore, the complexity does not increase as the number of flows or network size increases. Moreover, the framework is based on the DiffServ architecture; therefore, it requires minimal modification to the current Internet. We demonstrate that the proposed regulators can achieve latency bounds comparable to the IEEE asynchronous traffic shaping technique. We prove that the jitter is bounded even with realistic limitations such as buffers without cut-through capability. We also prove that in the presence of clock drift, the jitter can still be upper bounded with a suggested compensation algorithm. We demonstrate through experiments on simple programmable microcontrollers that the jitter upper bound can be within a few tens of microseconds, even in a realistic situation with store-and-forward buffers, clock drift, and random network delays.
- KSP 제안 키워드
- Compensation algorithm, Cut-through, End system, Guaranteed latency, Large network, Network delay, Relay Nodes, Scalable framework, State maintenance, Time Stamping, Time synchronization
본 저작물은 크리에이티브 커먼즈 저작자 표시 - 비영리 - 변경금지 (CC BY NC ND) 조건에 따라 이용할 수 있습니다.
